Brief Bio

Dr. Khan is a Professor of Electrical and Computer Engineering at the University of Connecticut. He leads the Computer Architecture Group (CAG) and also serves as an Associate Director of the Connecticut Advanced Computing Center (CACC). His research interests include computer architectures that exploit parallelism and locality for high-performance applications, such as graph intelligence problems. He has contributed architectural advancements for futuristic massively parallel microprocessors that substantially enhance system level performance and efficiency. Prior to joining UConn, Khan was a Postdoctoral Research Scientist at the Massachusetts Institute of Technology. He received Ph.D. from the University of Massachusetts Amherst. He spent several years in the semiconductor industry as a high-performance processor architect.

Dr. Khan is addressing the computational complexity problem in artificial intelligence applications that must handle increasingly large and sparse graph-based data, and optimize multiple goals at once, like finding the best trade-off between speed, fuel efficiency, and weather for autonomous vehicles. Efficient processing of sparse and multi-objective graph intelligence problems is extremely challenging since the underlying computations are highly irregular and require complex mathematical operations whose processing suffers from performance scaling challenges on existing hardware processing units. Dr. Khan is developing computer architectures that exploit sparsity for performance and massive parallelism to rapidly accelerate computationally hard artificial intelligence problems. This means exact solutions that used to take minutes to generate can be found in seconds or less. This allows decision-makers to have access to real-time information, leading to better decision-making in high-impact application scenarios.